Violin Memory 6000 Series Guida di Installazione

Technical Report Best Practices for Connecting Violin Memory Arrays to IBM AIX and PowerVM Host Attachment Guidelines for Using Violin Memory Ar

Connecting Violin Memory Arrays to IBM AIX and PowerVM 10 www.vmem.com 5 Storage Configuration NOTE: This LUN configuration is identical for

Connecting Violin Memory Arrays to IBM AIX and PowerVM 11 www.vmem.com 4. Select no of LUNs, unique names for LUNS, size for LUNS in Gigabytes,

Connecting Violin Memory Arrays to IBM AIX and PowerVM 12 www.vmem.com 5.2 Setting NACA Bit per LUN using command-line ( vMOS 5.5.1 and below)

Connecting Violin Memory Arrays to IBM AIX and PowerVM 13 www.vmem.com 5. Change NACA bit for all the LUNS you plan to export on AIX Hosts and

Connecting Violin Memory Arrays to IBM AIX and PowerVM 14 www.vmem.com 5.4 LUN Export to Initiator Group 1. Export LUNS to the IGroup by sel

Connecting Violin Memory Arrays to IBM AIX and PowerVM 15 www.vmem.com 6 LPAR/Host Configuration Please follow the steps provide in this sect

Connecting Violin Memory Arrays to IBM AIX and PowerVM 16 www.vmem.com NOTE: It is required to reboot the LPAR to make the above settings effect

Connecting Violin Memory Arrays to IBM AIX and PowerVM 17 www.vmem.com 6.4 LUN Discovery After creating LUNS and exporting them to the appropri

Connecting Violin Memory Arrays to IBM AIX and PowerVM 18 www.vmem.com 7 Discovering LUN and Enclosure Serial no on AIX The vMOS code level ,

Connecting Violin Memory Arrays to IBM AIX and PowerVM 2 www.vmem.com Table of Contents 1 Introduction ...

Connecting Violin Memory Arrays to IBM AIX and PowerVM 3 www.vmem.com 1 Introduction This technical report describes best practice recommendati

Connecting Violin Memory Arrays to IBM AIX and PowerVM 4 www.vmem.com 2 Planning for AIX Installation This section covers AIX platform-specific

Connecting Violin Memory Arrays to IBM AIX and PowerVM 5 www.vmem.com 3 Fibre Channel Best Practices Host attach of Violin Storage to AIX Parti

Connecting Violin Memory Arrays to IBM AIX and PowerVM 6 www.vmem.com 3.2 Fibre Channel SAN Topology In the topology shown in Figure 2, the Hos

Connecting Violin Memory Arrays to IBM AIX and PowerVM 7 www.vmem.com This is a fully redundant configuration that can survive SAN failures, Gat

Connecting Violin Memory Arrays to IBM AIX and PowerVM 8 www.vmem.com 3.4 SAN Configuration and Zoning The following best practices are recomme

Connecting Violin Memory Arrays to IBM AIX and PowerVM 9 www.vmem.com 4 Virtual IO (VIO Partitions) IBM PowerVM Supports N Port Virtualization